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VT82C686B 参数 Datasheet PDF下载

VT82C686B图片预览
型号: VT82C686B
PDF下载: 下载PDF文件 查看货源
内容描述: PCI SUPER -I / O集成外设控制器 [PCI Super-I/O Integrated Peripheral Controller]
分类和应用: 控制器PC
文件页数/大小: 128 页 / 1074 K
品牌: ETC [ ETC ]
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VT82C686B  
Memory Mapped I/O APIC Registers  
Indexed I/O APIC 32-Bit Registers  
Offset 0 APIC Identification (0000 0000h) .................. RW  
Memory Address FEC00000 APIC Index....................RW  
.......................................... default = 00h  
........................................always reads 0  
7-0 APIC Index  
31-28 Reserved  
8-bit pointer to APIC registers.  
..................................default = 0  
27-24 APIC Identification  
Software must program this value before using the  
APIC.  
Memory Address FEC00013-10 APIC 32-bit Data .....RW  
.................... default = 0000 0000h  
31-0 APIC 32-bit Data  
........................................always reads 0  
23-0 Reserved  
Data for the APIC register pointed to by the APIC  
index  
Offset 1 APIC Version (0017 0011h)............................. RO  
....................................always reads 00h  
31-24 Reserved  
Memory Address FEC00020 APIC IRQ Pin AssertionWO  
...................always reads 17h  
23-16 Maximum Redirection  
........................................ always reads 0  
7-5 Reserved  
Equal to the number of APIC interrupt pins minus  
one. For this APIC, this value is 17h (23 decimal).  
........................default undefined  
4-0 APIC IRQ Number  
IRQ # for this interrupt. Valid values are 0-23 only.  
....................................always reads 00h  
15-8 Reserved  
..................................always reads 11h  
The implementation version for this APIC is 11h.  
7-0 APIC Version  
Memory Address FEC00040 APIC EOI ..................... WO  
................default undefined  
7-0 Redirection Entry Clear  
When a write is issued to this register, the APIC will  
check this field and compare it with the vector field  
for each entry in the I/O redirection table. When a  
match is found, the Remote_IRRbit for that I/O  
Redirection Entry will be cleared.  
Offset 2 APIC Arbitration (0000 0000h) ...................... RO  
....................................always reads 00h  
31-28 Reserved  
......................always reads 00h  
27-24 APIC Arbitration ID  
....................................always reads 00h  
23-0 Reserved  
Revision 1.71 June 9, 2000  
-115- Function 5 & 6 Registers - AC97 Audio & Modem Codecs  
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