CD-700, VCXO Based PLL
Figure 7, SPICE Model
Vi Ri
E1 R2 C1
E2 R1 C2
Rf
Cf E3 R5 C4
E4 R6 C5 E5
E6
1
2
3
4
5
6
7
8
9
10
11
12
*****CD-700 ac Loop model
vi 1 0 ac 1
ri 1 0 1K
*****Phase Detector
e1 2 0 1 0 1 (for closed loop response use: e1 2 0 1 12 1)
r2 2 3 30K
c1 2 0 60p
*****Phase Detector Gain=0.53 x Data Density (Data Density=1 for clocks) for 5 volt
operation and = 0.35 x Data Density for 3.3 volt operation
e2 4 0 3 0 .35
*****Loop filter
r1 4 5 60K
c2 5 0 10p
rf 5 6 90K
cf 6 7 1.0u
e3 7 0 5 0 –10000
***** VCXO, Input Bandwidth=50kHz
r5 7 8 160K
c4 8 0 20p
*****VCXO Gain x 2pi (Example, use OUT1 x 100ppm x 2 x pi)
e4 9 0 8 0 12214
*****1/S model
r6 9 10 1000
c5 10 11 0.001
e5 11 0 10 0 –1e6
****Divide by N
e6 12 0 11 0 1
r8 12 0 1K
The bold numbers are user selectable R/C and data density values, and are from figure
11.
Vectron International • 166 Glover Avenue, Norwalk, CT 06856 • Tel: 1-88-VECTRON-1• http://www.vectron.com
ETC [ ETC ]
