TEA1716T
NXP Semiconductors
Resonant power supply control IC with PFC
7.2.3 High-side driver floating supply (pin SUPHS)
The high-side driver is supplied by an external bootstrap buffer capacitor, CSUPHS. The
bootstrap capacitor is connected between the high-side reference pin HB and the
high-side driver supply input pin SUPHS. CSUPHS is charged from pin SUPREG via an
external diode DSUPHS. The voltage drop between SUPREG and SUPHS can be
minimized by carefully selecting the appropriate diode, especially when using large
MOSFETs and high switching frequencies.
7.2.4 High-voltage supply input (pin SUPHV)
In a stand-alone power supply application, this pin is connected to the boost voltage. The
HV start-up source (which delivers a constant current from SUPHV to SUPIC) charges
C
SUPIC and CSUPREG using this pin.
Short-circuit protection on pin SUPIC (SCP-SUPIC; see Section 7.9) limits the dissipation
in the HV start-up source when SUPIC is shorted to ground. It limits the current on
SUPHV (to Ired(SUPHV)) as long as the voltage on SUPIC is below Vscp(SUPIC)
.
Under normal operating conditions, the voltage on pin SUPIC exceeds Vscp(SUPIC) very
quickly after start-up and the HV start-up source switches to the nominal current
Inom(SUPHV)
.
During start-up and restart, the HV start-up source charges CSUPIC and regulates the
voltage on SUPIC by hysteretic control. So the start level has a small degree of hysteresis
V
V
start(hys)(SUPIC). The HV start-up source switches off when VSUPIC exceeds the start level
start(hvd)(SUPIC). Current consumption through pin SUPHV is low (Itko(SUPHV)).
Once start-up is complete and the HBC controller is operating, SUPIC can be supplied
from the auxiliary winding of the HBC transformer. In this operational state, the HV
start-up source is disabled.
7.3 Flow diagram
The operation of the TEA1716 can be divided into a number of states - see Figure 3. The
abbreviations used in Figure 3 are explained In Table 8.
TEA1716T
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Objective data sheet
Rev. 1 — 27 January 2012
9 of 46