TEA1716T
NXP Semiconductors
Resonant power supply control IC with PFC
• Boost charge state
The PFC controller is switching; the HBC controller is off. The current from the
high-voltage start-up source is large enough to supply SUPIC
(current consumption < Ich(nom)(SUPIC)).
• Operational supply state
Both the PFC and HBC controllers are switching. Current consumption is Ioper(SUPIC)
When the HBC controller is enabled, the switching frequency is high initially and the
.
current consumption of the HBC MOSFET drivers is dominant. The stored energy in
SUPIC supplies the initial SUPIC current before the SUPIC supply source takes over.
C
• Burst stop mode
Only a small section of the IC is active while CSUPREG is kept charged and the sensing
of the SNSBURST input is active. The PFC and HBC controllers are stopped. Current
consumption is limited to Iburstm(SUPIC)
.
Pin SUPIC has a low short-circuit detection voltage (Vscp(SUPIC); 0.65 V typical). The
current dissipated in the HV start-up source is limited while VSUPIC < Vscp(SUPIC)
(see Section 7.2.4).
7.2.2 Regulated supply (pin SUPREG)
The voltage range on pin SUPIC exceeds that of the gate voltages of the external
MOSFETs. For this reason, the TEA1716 contains an integrated series stabilizer. The
series stabilizer creates an accurate regulated voltage (Vreg(SUPREG); 11.3 V typical) at the
buffer capacitor CSUPREG. This stabilized voltage is used to:
• supply the internal PFC driver
• supply the internal low-side HBC driver
• supply the internal high-side driver via external components
• as a reference voltage for optional external circuits
The SUPREG series stabilizer is enabled after CSUPIC has been fully charged. This
ensures that any optional external circuitry connected to SUPREG does not dissipate any
of the start-up current.
The voltage on SUPREG must reach Vstart(SUPREG) (and the voltage on SUPIC must reach
the start level) before the IC starts operating to ensure that the external MOSFETs receive
sufficient gate drive current.
SUPREG is provided with undervoltage protection (UVP-SUPREG; see Section 7.9).
When VSUPREG falls below Vuvp(SUPREG) (10 V typical), two events are triggered:
• The IC stops operating to prevent unreliable switching because the gate driver voltage
is too low. The PFC controller stops switching immediately, but the HBC controller
continues until the low-side stroke is active.
• The maximum current from the internal SUPREG series stabilizer is reduced to
Ich(red)(SUPREG) (5.4 mA typical). This reduces the dissipation in the series stabilizer in
the event of an overload at SUPREG while SUPIC is supplied from an external DC
source.
TEA1716T
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Objective data sheet
Rev. 1 — 27 January 2012
8 of 46
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