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24LC02BT-I/SN 参数 Datasheet PDF下载

24LC02BT-I/SN图片预览
型号: 24LC02BT-I/SN
PDF下载: 下载PDF文件 查看货源
内容描述: 串行EEPROM | 256X8 | CMOS |专科| 8PIN |塑料\n [SERIAL EEPROM|256X8|CMOS|SOP|8PIN|PLASTIC ]
分类和应用: 内存集成电路光电二极管PC可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
文件页数/大小: 24 页 / 380 K
品牌: ETC [ ETC ]
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24AA02/24LC02B
1.2
AC C
haracteristics
V
CC
= +1.8V to +5.5V
Industrial (I):
T
AMB
= -40°C to +85°C
Automotive (E):
T
AMB
= -40°C to +125°C
Min
600
4000
1300
4700
600
4000
600
4700
0
100
250
600
4000
1300
4700
Typ
Max
400
100
300
1000
300
900
3500
Units
kHz
ns
ns
ns
Conditions
2.5V
V
CC
5.5V
1.8V
V
CC
<
2.5V (24AA02)
2.5V
V
CC
5.5V
1.8V
V
CC
<
2.5V (24AA02)
2.5V
V
CC
5.5V
1.8V
V
CC
<
2.5V (24AA02)
2.5V
V
CC
5.5V
1.8V
V
CC
<
2.5V (24AA02)
2.5V
V
CC
5.5V
1.8V
V
CC
<
2.5V (24AA02)
2.5V
V
CC
5.5V
1.8V
V
CC
<
2.5V (24AA02)
2.5V
V
CC
5.5V
1.8V
V
CC
<
2.5V (24AA02)
2.5V
V
CC
5.5V
1.8V
V
CC
<
2.5V (24AA02)
2.5V
V
CC
5.5V
1.8V
V
CC
<
2.5V (24AA02)
2.5V
V
CC
5.5V
1.8V
V
CC
<
2.5V (24AA02)
AC CHARACTERISTICS
Param.
No.
1
2
3
4
Sym
F
CLK
T
HIGH
Characteristic
Clock frequency
Clock high time
Clock low time
SDA and SCL rise time
SDA and SCL fall time
T
LOW
T
R
5
6
7
8
9
10
11
12
T
F
ns
ns
ns
ns
ns
ns
ns
ns
T
HD
:
STA
START condition hold
time
T
SU
:
STA
START condition setup
time
T
HD
:
DAT
Data input hold time
T
SU
:
DAT
Data input setup time
T
SU
:
STO
STOP condition setup
time
T
AA
T
BUF
Output valid from clock
Bus free time: Time the
bus must be free before
a new transmission can
start
Output fall time from V
IH
minimum to V
IL
maxi-
mum
Input filter spike
suppression
(SDA and SCL pins)
Write cycle time (byte or
page)
Endurance
13
T
OF
20+0.1C
B
250
250
50
ns
2.5V
V
CC
5.5V
1.8V
V
CC
<
2.5V (24AA02)
14
T
SP
ns
15
16
T
WC
1M
5
ms
cycles 25°C, V
CC
= 5.0V, Block
Mode
Note 1:
Not 100% tested. C
B
= total capacitance of one bus line in pF.
2:
As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of START or STOP conditions.
3:
The combined T
SP
and V
HYS
specifications are due to new Schmitt trigger inputs which provide improved
noise spike suppression. This eliminates the need for a
T
I
specification for standard operation.
4:
This parameter is not tested but ensured by characterization. For endurance estimates in a specific appli-
cation, please consult the Total Endurance Model which can be obtained on Microchip’s website:
www.microchip.com.
2002 Microchip Technology Inc.
DS21709A-page 3