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24LC02BT-I/SN 参数 Datasheet PDF下载

24LC02BT-I/SN图片预览
型号: 24LC02BT-I/SN
PDF下载: 下载PDF文件 查看货源
内容描述: 串行EEPROM | 256X8 | CMOS |专科| 8PIN |塑料\n [SERIAL EEPROM|256X8|CMOS|SOP|8PIN|PLASTIC ]
分类和应用: 内存集成电路光电二极管PC可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
文件页数/大小: 24 页 / 380 K
品牌: ETC [ ETC ]
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24AA02/24LC02B
4.0
4.1
WRITE OPERATION
Byte Write
4.2
Page Write
Following the START condition from the master, the
device code (4 bits), the block address (3 bits, don’t
cares) and the R/W bit which is a logic LOW is placed
onto the bus by the master transmitter. This indicates to
the addressed slave receiver that a byte with a word
address will follow after it has generated an acknowl-
edge bit during the ninth clock cycle. Therefore, the
next byte transmitted by the master is the word address
and will be written into the address pointer of the
24XX02. After receiving another acknowledge signal
from the 24XX02, the master device will transmit the
data word to be written into the addressed memory
location. The 24XX02 acknowledges again and the
master generates a STOP condition. This initiates the
internal write cycle, and during this time the 24XX02
will not generate acknowledge signals (Figure 4-1).
The write control byte, word address and the first data
byte are transmitted to the 24XX02 in the same way as
in a byte write. But instead of generating a STOP con-
dition the master transmits up to 8 data bytes to the
24XX02, which are temporarily stored in the on-chip
page buffer and will be written into the memory after the
master has transmitted a STOP condition. After the
receipt of each word, the four lower order address
pointer bits are internally incremented by ‘
1
’. The
higher order 7 bits of the word address remains con-
stant. If the master should transmit more than 8 words
prior to generating the STOP condition, the address
counter will roll over and the previously received data
will be overwritten. As with the byte write operation,
once the STOP condition is received an internal write
cycle will begin (Figure 4-2).
Note:
Page write operations are limited to writ-
ing bytes within a single physical page,
regardless
of the number of bytes actu-
ally being written. Physical page bound-
aries start at addresses that are integer
multiples of the page buffer size (or
‘page size’) and end at addresses that
are integer multiples of [page size - 1]. If
a page write command attempts to write
across a physical page boundary, the
result is that the data wraps around to
the beginning of the current page (over-
writing data previously stored there),
instead of being written to the next page
as might be expected. It is therefore
necessary for the application software to
prevent page write operations that
would attempt to cross a page boundary.
FIGURE 4-1:
BUS ACTIVITY
MASTER
BYTE WRITE
S
T
A
R
T
S
A
C
K
A
C
K
A
C
K
CONTROL
BYTE
WORD
ADDRESS
S
T
O
P
P
DATA
SDA LINE
BUS ACTIVITY
FIGURE 4-2:
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
PAGE WRITE
S
T
A
R
T
S
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
CONTROL
BYTE
WORD
ADDRESS (n)
S
T
O
P
P
DATA (n)
DATA (n + 1)
DATA (n + 7)
2002 Microchip Technology Inc.
DS21709A-page 7