AC CHARACTERISTICS FOR SELECTED CELLS
The CLA70000 technology library contains all the timing
information for each cell in the design library. This information
is accessible to the simulator, which calculates propagation
delays for all signal paths in the circuit design. The simulator
can automatically derate timings according to the various
factors such as:
For initial assessments of feasibility, path delay multipliers
can be estimated by referring to the following graphs in
conjunction with the appropriate delays in the tables.
Supply voltage variation (from nominal 5V)
Junction temperature
Processing tolerance - manufacturing spreads
Gate fanout - logic loading on gate outputs
Interconnection wiring - net loading on gate outputs
Normalised Delay Multiplier Vs
temperature
1.4
1.2
1
0.8
0.6
0.4
0.2
0
-60
-10
40
90
140
Temperature °C
Fig 6.
Normalised Delay Multiplier Vs
Voltage
1.6
1.4
1.2
1
0.8
3
3.5
4
4.5
5
5.5
Voltage
Fig 7.
ETC [ ETC ]
