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RTL8211 参数 Datasheet PDF下载

RTL8211图片预览
型号: RTL8211
PDF下载: 下载PDF文件 查看货源
内容描述: - 12号的铝制车身绘( RAL 7032 ) []
分类和应用:
文件页数/大小: 56 页 / 1740 K
品牌: ETC [ ETC ]
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RTL8211C & RTL8211CL  
Datasheet  
Bit  
Name  
RW  
Default Description  
0.7  
Collision test  
RW  
0
Collision Test.  
1: Collision test enabled  
0: Normal operation  
When set, this bit will cause the COL signal to be asserted in response to  
the assertion of TXEN within 512-bit times. The COL signal will be  
de-asserted within 4-bit times in response to the de-assertion of TXEN.  
0.6  
Speed[1]  
RSVD  
RW  
RO  
1
Speed Select bit 1.  
Refer to bit 0.13.  
0.5:0  
000000 Reserved.  
Note 1: SC: Self-cleared  
Note 2: The power-on duplex, speed, and ANE values take on the values set by external pins AN[3:0] on hardware reset  
only. A write to these registers has no effect unless any one of the following also occurs: Software reset (0.15) is asserted,  
Restart_AN (0.9) is asserted, or PWD (0.11) transitions from power down to normal operation.  
Note 3: When the RTL8211C(L) is switched from power down to normal operation, software reset and restart  
auto-negotiation are performed even if bits Reset (0.15) and Restart_AN (0.9) are not set by the user.  
Note 4: Auto-Negotiation is enabled when speed is set to 1000Base-T. Crossover Detection & Auto-Correction takes  
precedence over Auto-Negotiation disable (0.12=0). If ANE is disabled, speed and duplex capabilities are advertised by  
0.13, 0.6, and 0.8. Otherwise, register 4.8:5 and 9.9:8 take effect.  
Note 5: Auto-Negotiation automatically restarts after hardware or software reset regardless of whether or not the restart bit  
(0.9) is set.  
7.2.2. BMSR (Basic Mode Status Register, Address 0x01)  
Table 22. BMSR (Basic Mode Status Register, Address 0x01)  
Bit  
Name  
RW  
Default Description  
1.15  
100Base-T4  
RO  
0
1
100Base-T4 Capability.  
The RTL8211C(L) does not support 100Base-T4 mode. This bit  
should always be 0.  
1.14  
1.13  
1.12  
1.11  
1.10  
100Base-TX (full)  
100Base-TX (half)  
10Base-T (full)  
RO  
RO  
RO  
RO  
RO  
100Base-TX Full Duplex Capability.  
1: Device is able to perform 100Base-TX in full duplex mode  
0: Device is not able to perform 100Base-TX in full duplex mode  
100Base-TX Half Duplex Capability.  
1
1
1
0
1: Device is able to perform 100Base-TX in half duplex mode  
0: Device is not able to perform 100Base-TX in half duplex mode  
10Base-T Full Duplex Capability.  
1: Device is able to perform 10Base-T in full duplex mode.  
0: Device is not able to perform 10Base-T in full duplex mode.  
10Base-T Half Duplex Capability.  
10Base-T (half)  
100Base-T2 (full)  
1: Device is able to perform 10Base-T in half duplex mode  
0: Device is not able to perform 10Base-T in half duplex mode  
100Base-T2 Full Duplex Capability.  
The RTL8211C(L) does not support 100Base-T2 mode and this bit  
should always be 0.  
Integrated 10/100/1000 Gigabit Ethernet Transceiver  
24  
Track ID: JATR-1076-21 Rev. 1.3  
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