RTL8211C & RTL8211CL
Datasheet
5.3. RGMII
Table 3. RGMII
Type Description
Pin No.
(64-pin)
Pin No.
(48-pin)
Pin Name
24
22
TXC
I
The transmit reference clock will be 125MHz, 25MHz, or 2.5MHz
±50ppm depending on speed.
25
26
27
28
29
22
23
24
25
26
27
19
TXD[0]
TXD[1]
TXD[2]
TXD[3]
TXCTL
RXC
I
I
Transmit Data.
Data is transmitted from MAC to PHY via TXD[3:0].
I
I
I
Receive Control Signal from the MAC.
O
The continuous receive reference clock will be 125MHz, 25MHz, or
2.5MHz ±50ppm. and is derived from the received data stream
17
19
20
21
16
19
14
16
17
18
13
16
RXD[0]
RXD[1]
RXD[2]
RXD[3]
RXCTL
TXDLY
O
O
O
O
O
I
Receive Data.
Data is transmitted from PHY to MAC via RXD[3:0].
Transmit Control Signal to the MAC.
RGMII Transmit Clock Timing Control.
1: Add 2 ns delay to TXC for TXD latching
RGMII Receiver Clock Timing Control.
1: Add 2ns delay to RXC for RXD latching
43
38
RXDLY
I
5.4. Management Interface
Table 4. Management Interface
Pin No.
(64-pin)
Pin No.
(48-pin)
Pin Name
Type Description
30
31
30
31
MDC
I
Management Data Clock.
MDIO
IO
Input/Output of Management Data.
5.5. Reset
Table 5. Reset
Pin No.
(64-pin)
Pin No.
(48-pin)
Pin Name
Type
Description
38
29
PHYRSTB
I
Hardware Reset. Active low.
Integrated 10/100/1000 Gigabit Ethernet Transceiver
6
Track ID: JATR-1076-21 Rev. 1.3
ETC [ ETC ]
