CY7C455
CY7C456
CY7C457
Switching Waveforms
Write Clock Timing Diagram
CKW
t
SD
D
0
−
17
VALID DATA IN
t
CKW
t
CKH
ENABLED WRITE
t
CKL
DISABLED WRITE
t
HD
t
SEN
ENW
t
FH
E/F,PAFE,HF
t
HEN
t
SEN
t
HEN
t
FD
t
FH
t
FD
c455-6
Read Clock Timing Diagram
t
CKH
CKR
t
CKR
t
CKL
DISABLED READ
ENABLED READ
t
OH
Q
0
−
17
PREVIOUS WORD
t
A
NEW WORD
t
SEN
ENR
t
FH
E/F,PAFE
t
HEN
t
SEN
t
HEN
t
FD
t
FH
[17, 18, 19, 20]
t
FD
c455-7
MasterReset (Defaultwith Free-RunningClocks) Timing Diagram
t
PMR
MR
t
SCMR
CKW
t
MRR
FIRST
WRITE
ENW
t
SCMR
CKR
ENR
t
OHMR
Q
0
−
17
VALID DATA
t
MRR
t
AMR
ALL DATA
OUTPUTS LOW
t
MRF
E/F,PAFE
t
MRF
HF
c455-8
Notes:
17. To only perform reset (no programming), the following criteria must be met: ENW or CKW must be inactive while MR is LOW.
18. To only perform reset (no programming), the following criteria must be met: ENR or CKR must be inactive while MR is LOW.
19. All data outputs (Q
0 - 17
) go LOW as a result of the rising edge of MR after t
AMR
.
20. In this example, Q
0 - 17
will remain valid until t
OHMR
if either the first read shown did not occur or if the read occurred soon enough such that the valid
data was caused by it.
Document #: 38-06003 Rev. **
Page 7 of 23
ETC [ ETC ]
