PIC12F510/16F506
DECF
Decrement f
INCF
Increment f
Syntax:
[ label ] DECF f,d
Syntax:
[ label ] INCF f,d
Operands:
0 ≤ f ≤ 31
d ∈ [0,1]
Operands:
0 ≤ f ≤ 31
d ∈ [0,1]
Operation:
(f) – 1 → (dest)
Operation:
(f) + 1 → (dest)
Status Affected:
Description:
Z
Status Affected:
Description:
Z
Decrement register ‘f’. If ‘d’ is ‘0’,
the result is stored in the W
register. If ‘d’ is ‘1’, the result is
stored back in register ‘f’.
The contents of register ‘f’ are
incremented. If ‘d’ is ‘0’, the result
is placed in the W register. If ‘d’ is
‘1’, the result is placed back in
register ‘f’.
DECFSZ
Decrement f, Skip if 0
INCFSZ
Increment f, Skip if 0
Syntax:
[ label ] DECFSZ f,d
Syntax:
[ label ] INCFSZ f,d
Operands:
0 ≤ f ≤ 31
d ∈ [0,1]
Operands:
0 ≤ f ≤ 31
d ∈ [0,1]
Operation:
(f) – 1 → d; skip if result = 0
Operation:
(f) + 1 → (dest), skip if result = 0
Status Affected: None
Status Affected: None
Description:
The contents of register ‘f’ are
Description:
The contents of register ‘f’ are
decremented. If ‘d’ is ‘0’, the result
is placed in the W register. If ‘d’ is
‘1’, the result is placed back in
register ‘f’.
incremented. If ‘d’ is ‘0’, the result
is placed in the W register. If ‘d’ is
‘1’, the result is placed back in
register ‘f’.
If the result is ‘0’, the next instruc-
tion, which is already fetched, is
discarded and a NOPis executed
instead making it a two-cycle
instruction.
If the result is ‘0’, then the next
instruction, which is already
fetched, is discarded and a NOPis
executed instead making it a
two-cycle instruction.
GOTO
Unconditional Branch
IORLW
Inclusive OR literal with W
Syntax:
[ label ] GOTO k
0 ≤ k ≤ 511
Syntax:
[ label ] IORLW k
0 ≤ k ≤ 255
Operands:
Operation:
Operands:
Operation:
Status Affected:
Description:
k → PC<8:0>;
STATUS <6:5> → PC<10:9>
(W) .OR. (k) → (W)
Z
Status Affected: None
The contents of the W register are
OR’ed with the eight-bit literal ‘k’.
The result is placed in the
W register.
Description: GOTOis an unconditional branch.
The 9-bit immediate value is
loaded into PC bits <8:0>. The
upper bits of PC are loaded from
STATUS <6:5>. GOTOis a two-
cycle instruction.
© 2006 Microchip Technology Inc.
Preliminary
DS41268B-page 75
ETC [ ETC ]
