Data Sheet
June 2002
TMXF28155 Supermapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
12 28-Channel Framer Registers (continued)
Table 459. Framer Register Map (continued)
Address
Symbol
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Arbiter Link Registers—R/W; See Table 429 for values of L and T in the register address field.
0x8LPF0
page 300
FRM_ARLR1
FRM_ARLR2
FRM_ARLR3
FRM_
LNK_ENA
FRM_LNK_ FRM_LNK_ FRM_LNK_
FRM_
ICKEDGE
TRANSP
RESTARTN REFRAME
0x8LPF1
page 301
FRM_ESF_ FRM_FAST
CRC_EN
FRM_OPT[1:0]
FRM_FBE_
MODE
FRM_LF_CRT[2:0]
FRM_
FRM_RAIL3_DEC[1:0]
FRM_MODE[3:0]
AUTO_AIS
0x8LPF2
page 304
FRM_TP_CK FRM_TP_
_SRC_EN
FRM_TP_
DD_SRC
FRM_
SYSFSM
CK_SRC
Frame Formatter Link Registers—R/W; See Table 429 for values of L and T in the register address field.
0x8LPF4
page 305
FRM_FFLR1
FRM_FFLR2
FRM_
ESFRAMD
FRM_ZCSMD[2:0]
FRM_
OCKEDGE
FRM_
FRM_
FRM_
FRM_
AUTOPLB AUTOLLB AUTOEBIT AUTORAI
0x8LPF5
page 306
FRM_TXLBMD[1:0]
FRM_
TXLLBOFF TXLLBON
FRM_
FRM_TXIID
FRM_
TXAUXP
FRM_
TXRAI
FRM_
TXAIS
Line Decoder/Encoder Link Registers—R/W; see Table 439 and Table 441 for values of L and T in the register address field.
0x8LTFC
page 308
FRM_LDLR1
FRM_LDLR2
FRM_
EXCZERO
FRM_RLCLK_
FRM_LD_MODE[2:0]
FRM_LE_MODE[2:0]
EDGE
0x8LRFD
page 308
FRM_TLCLK_
EDGE
HDLC Channel Registers—R/W; See Table 444 for mapping of H and P in the register address field.
Transmit HDLC Channel Registers
FRM_TTIMESLOT[4:0]
0x8HP80
page 309
FRM_HCR1
FRM_HCR2
FRM_HCR3
FRM_TBIT_IM[7:0]
0x8HP81
page 309
FRM_TFRAME_SEL[1:0]
FRM_TLINK[4:0]
0x8HP82
page 310
FRM_THC_
RESET
FRM_
TENABL
FRM_CFLAGS[1:0]
FRM_
FRM_
FRM_C_R
FRM_
FRM_IFCS
FRM_
FRM_
FRM_HXPIDLE[1:0]
PRMEN
TLOOP
HTTHRSEL
HTIDLE HTMODE
0x8HP83 FRM_HCR4 (RO)
page 311
0
0
0
0
0
0
0
0
0
0
0
0
0
FRM_
HTUND HTDONE
FRM_
FRM_
HTTHRSH
0x8HP84
page 311
FRM_HCR5
FRM_ FRM_
MHTUND MHTDONE MHTTHRSH
FRM_
0x8HP85 FRM_HCR6(WO)
page 309
FRM_HTFUNC[1:0]
FRM_HTDATA[7:0]
FRM_HTCOUNT[9:0]
0x8HP86
page 312
FRM_HCR7
Receive HDLC Channel Registers
FRM_RTIMESLOT[4:0]
0x8HP00
page 312
FRM_HCR8
FRM_HCR9
FRM_HCR10
FRM_RBIT_IM[7:0]
0x8HP01
page 312
FRM_RFRAME_SEL[1:0]
FRM_RLINK[4:0]
0x8HP02
page 313
FRM_RHC_
RESET
FRM_
RENABL
FRM_
FRM_RFCS
FRM_
FRM_
FRM_MATCH[7:0]
FRM_
RTHRSEL
HRMODE
BYTAL
0x8HP03 FRM_HCR11 (RO)
page 314
0
0
0
0
0
0
0
0
0
0
0
0
FRM_
FRM_EOP
FRM_
RIDLE
OVR
HRTHRSH
0x8HP04
page 314
FRM_HCR12
FRM_
MIDLE
FRM_
MOVR
FRM_
MEOP
FRM_
MHRTHRSH
0x8HP05 FRM_HCR13 (RO)
page 315
0
0
0
0
0
FRM_HMDA
FRM_
HRVALID HRTYPE
FRM_
FRM_HR_DATA[7:0]
FRM_HOVR FRM_HEOP
FRM_
FRM_HABRT FRM_HIDL
FRM_HBIT[2:0]
HCRCERR
0x8HP06
page 315
FRM_HCR14
(COR)
FRM_HRCOUNT[9:0]
Agere Systems Inc.
325
ETC [ ETC ]
