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RTL8021N-GR 参数 Datasheet PDF下载

RTL8021N-GR图片预览
型号: RTL8021N-GR
PDF下载: 下载PDF文件 查看货源
内容描述: - 12号的铝制车身绘( RAL 7032 ) []
分类和应用:
文件页数/大小: 40 页 / 606 K
品牌: ETC [ ETC ]
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RTL8201N  
Datasheet  
8.5. Serial Network Interface  
The RTL8201N also supports the traditional 7-wire serial interface to operate with legacy MACs or  
embedded systems. To setup for this mode of operation, pull the MII/SNIB pin low. By doing so, the  
RTL8201N will ignore the setup of the ANE and SPEED pins. In this mode, the RTL8201N will set the  
default operation to 10Mbps and half-duplex mode.  
Note: The RTL8201N also supports full-duplex mode operation if the DUPLEX pin has been pulled high.  
This interface consists of a 10Mbps transmit and receive clock generated by PHY, 10Mbps transmit and  
receive serial data, transmit enable, collision detect, and carry sense signals.  
8.6. Power Down, Link Down, Power Saving, and Isolation Modes  
Four types of Power Saving mode operation are supported. This section describes how to implement each  
mode. The first three modes are configured through software, and the fourth through hardware.  
Table 28. Power Saving Mode Pin Settings  
Mode  
Description  
Analog Off  
Setting bit 11 of register 17 to 1 will put the RTL8201N into analog off state. In analog off state, the  
RTL8201N will power down all analog functions such as transmit, receive, PLL, etc. However, the  
internal 25MHz crystal oscillator will not be powered down. Digital functions in this mode are still  
available which allows reacquisition of analog functions  
LDPS  
Setting bit 12 of register 17 to 1, or pulling the LDPS pin high will put the RTL8201N into LDPS  
(Link Down Power Saving) mode. In LDPS mode, the RTL8201N will detect the link status to decide  
whether or not to turn off the transmit function. If the link is off, FLP or 100Mbps IDLE/10Mbps  
NLP will not be transmitted. However, some signals similar to NLP will be transmitted. Once the  
receiver detects leveled signals, it will stop the signal and transmit FLP or 100Mbps IDLE/10Mbps  
NLP again. This can cut power used by 60%~80% when the link is down.  
PWD  
Setting bit 11 of register 0 to 1 puts the RTL8201N into power down mode. This is the maximum  
power saving mode while the RTL8201N is still alive. In PWD mode, the RTL8201N will turn off all  
analog/digital functions except the MDC/MDIO management interface. Therefore, if the RTL8201N  
is put into PWD mode and the MAC wants to recall the PHY, it must create the MDC/MDIO timing  
by itself (this is done by software).  
Isolation  
This mode is different from the three previous software configured power saving modes. This mode is  
configured by hardware pin 52. Setting pin 52 high will isolate the RTL8201N from the Media Access  
Controller (MAC) and the MDC/MDIO management interface. In this mode, power consumption is  
minimal.  
Single-Chip/Port 10/100 Fast Ethernet PHYceiver  
With Auto MDIX  
21  
Rev. 1.2