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RTL8021N-GR 参数 Datasheet PDF下载

RTL8021N-GR图片预览
型号: RTL8021N-GR
PDF下载: 下载PDF文件 查看货源
内容描述: - 12号的铝制车身绘( RAL 7032 ) []
分类和应用:
文件页数/大小: 40 页 / 606 K
品牌: ETC [ ETC ]
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RTL8201N  
Datasheet  
6.6. Device Configuration Interface  
Table 6. Device Configuration Interface  
Description  
53, 54, 56, PHYAddress.  
Name  
Type  
Pin No.  
CONFIG[4:0]  
I
57, 58  
Set the PHY address for the device.  
CONFIG[5] LI/O  
CONFIG[6] LI/O  
47  
Repeater mode.  
Set high to put the RTL8201N into repeater mode. This pincan be directlyconnected  
to GND or VCC.  
46  
37  
35  
MII/SNI interface.  
This pin is latched to input during a power on or reset condition. Pull high to set  
the RTL8201N into SNI mode operation. Set low for MII mode. Thispin canbe  
directly connected to GND or VCC.  
CONFIG[7]  
LI  
Auto-negotiation mode.  
This pin is latched to input during a power on or reset condition. Set high to enable  
Auto-negotiation mode, set low to force mode. Thispin canbe directlyconnected to  
GND or VCC.  
CONFIG[8] LI/O  
Fiber/UTP Enable.  
During power on reset, this pin status is latched to determine the media mode to  
operate in.  
1: Fiber mode  
0: UTP mode  
An internal weak pull low resistor sets this to the default of UTP mode. It is possible to  
use an external 5.1Kpull high resistor to enable fiber mode.  
CONFIG[9]  
ISOLATE  
LI  
I
33  
52  
Speed mode.  
This pin is latched to input during a power on or reset condition. Set high to put  
the RTL8201N into 100Mbps operation. This pin can be directly connected to GND or  
VCC.  
Set high to isolate the RTL8201N from the MAC. This will also isolate the MDC/MDIO  
management interface. In this mode, the power consumption is minimal. This pin can be  
directly connected to GND or VCC.  
DUPLEX  
LDPS  
LI  
I
51  
44  
This pin is latched to input during a power on or reset condition. Set high to enable  
full duplex. This pin can be directly connected to GND or VCC.  
Set high to put the RTL8201N into LDPS mode. Thispin can bedirectly connected to  
GND or VCC (see 8.6 Power Down, Link Down, Power Saving, and Isolation  
Modes, page 21, for more information).  
6.7. LED Interface  
Table 7. LED Interface/PHY Address Configuration  
Name  
Type Pin No. Description  
LED_LINK10  
LED_LINK100  
LED_DUPLEX  
LED_RX  
O
O
O
O
O
50  
48  
43  
40  
39  
10Mbps link indicator.  
100Mbps link indicator.  
Duplex LED.  
Receive LED.  
LED_TX  
Transmit LED.  
Single-Chip/Port 10/100 Fast Ethernet PHYceiver  
With Auto MDIX  
8
Rev. 1.2