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RTL8021N-GR 参数 Datasheet PDF下载

RTL8021N-GR图片预览
型号: RTL8021N-GR
PDF下载: 下载PDF文件 查看货源
内容描述: - 12号的铝制车身绘( RAL 7032 ) []
分类和应用:
文件页数/大小: 40 页 / 606 K
品牌: ETC [ ETC ]
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RTL8201N  
Datasheet  
6.4. Clock Interface  
Table 4. Clock Interface  
Description  
25MHz Crystal Output.  
Name  
Type  
Pin No.  
CKXTAL2  
O
62  
This pin provides the 25MHz crystal output. It must be left open when an external  
25MHz oscillator drives X1.  
CKXTAL1  
I
61  
25MHz Crystal Input.  
This pin provides the 25MHz crystal input. If a 25MHz oscillator is used, connect  
CKXTAL1 to the oscillator’s output (see 9.3 Crystal Characteristics, page 32, for  
clock source specifications).  
6.5. 10Mbps/100Mbps Network Interface  
Table 5. 10Mbps/100Mbps Network Interface  
Name  
MDI+[0]  
MDI-[0]  
Type  
O
O
Pin No.  
Description  
3
4
Transmit Output.  
Differential transmit output pair shared by 100Base-TX, 100Base-FX and 10Base-  
T modes. When configured as 100Base-TX, output is an MLT-3 encoded  
waveform. When configured as 100Base-FX, the output is pseudo-ECL level.  
RSET  
I
1
Transmit Bias Resistor Connection.  
This pin should be pulled to GND by a 2K(1%) resistor to define driving current  
for the transmit DAC. The resistance value may be changed, depending on  
experimental results of the RTL8201N.  
MDI+[1]  
MDI-[1]  
I
I
6
7
Receive Input.  
Differential receive input pair shared by 100Base-TX, 100Base-FX, and 10Base-T  
modes.  
Single-Chip/Port 10/100 Fast Ethernet PHYceiver  
With Auto MDIX  
7
Rev. 1.2