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1.4.2. LPL 2.4” initial code
void ILI9320_LPL24_Initial(void)
{
// VCI=2.8V
//************* Reset LCD Driver ****************//
LCD_nRESET = 1;
delayms(1); // Delay 1ms
LCD_nRESET = 0;
delayms(10); // Delay 10ms
LCD_nRESET = 1;
delayms(50); // Delay 50 ms
//************* Start Initial Sequence **********//
LCD_CtrlWrite_ILI9320(0x00E5, 0x8000); // Set the internal vcore voltage
// Start internal OSC.
LCD_CtrlWrite_ILI9320(0x0000, 0x0001);
LCD_CtrlWrite_ILI9320(0x0001, 0x0100);
LCD_CtrlWrite_ILI9320(0x0002, 0x0700);
LCD_CtrlWrite_ILI9320(0x0003, 0x1030);
LCD_CtrlWrite_ILI9320(0x0004, 0x0000);
LCD_CtrlWrite_ILI9320(0x0008, 0x0202);
LCD_CtrlWrite_ILI9320(0x0009, 0x0000);
LCD_CtrlWrite_ILI9320(0x000A, 0x0000);
LCD_CtrlWrite_ILI9320(0x000C, 0x0000);
LCD_CtrlWrite_ILI9320(0x000D, 0x0000);
LCD_CtrlWrite_ILI9320(0x000F, 0x0000);
// set SS and SM bit
// set 1 line inversion
// set GRAM write direction and BGR=1.
// Resize register
// set the back porch and front porch
// set non-display area refresh cycle ISC[3:0]
// FMARK function
// RGB interface setting
// Frame marker Position
// RGB interface polarity
//*************Power On sequence ****************//
LCD_CtrlWrite_ILI9320(0x0010, 0x0000);
LCD_CtrlWrite_ILI9320(0x0011, 0x0007);
LCD_CtrlWrite_ILI9320(0x0012, 0x0000);
LCD_CtrlWrite_ILI9320(0x0013, 0x0000);
// SAP, BT[3:0], AP, DSTB, SLP, STB
// DC1[2:0], DC0[2:0], VC[2:0]
// VREG1OUT voltage
// VDV[4:0] for VCOM amplitude
delayms(200); // Dis-charge capacitor power voltage
LCD_CtrlWrite_ILI9320(0x0010, 0x17B0);
LCD_CtrlWrite_ILI9320(0x0011, 0x0137);
delayms(50); // Delay 50ms
// SAP, BT[3:0], AP, DSTB, SLP, STB
// DC1[2:0], DC0[2:0], VC[2:0]
// VREG1OUT voltage
LCD_CtrlWrite_ILI9320(0x0012, 0x013C);
delayms(50); // Delay 50ms
// VDV[4:0] for VCOM amplitude
// VCM[4:0] for VCOMH
LCD_CtrlWrite_ILI9320(0x0013, 0x1600);
LCD_CtrlWrite_ILI9320(0x0029, 0x0007);
delayms(50);
LCD_CtrlWrite_ILI9320(0x0020, 0x0000);
// GRAM horizontal Address
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