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L3M
TXC-03452B
DATA SHEET
BLOCK DIAGRAM
SDH/SONET SIDE
LINE SIDE
XC1
XCLKE
XCLKI
TRANSMIT
RNRZD
RNRZC
TPOS
TNEG/LOS
TCLK
ACLK
AC1J1
ASPE
ADD
INPUT
STUFF/
SYNC
BLOCK
ADD
BUILD
BLOCK
BLOCK
BLOCK
8
ADATA(7-0)
INTEL MOTOROLA
8
APAR
D7 - D0
A7 - A0
SEL
RD
WR
RDY
RESET
INT
D7 - D0
A7 - A0
SEL
8
µP
I/O
TOCHC
RD/WR
OVERHEAD
TOCHD
ROCHC
ROCHD
COMM
CHANNEL
I/O
DS3/E3
AIS GEN
DTACK
RESET
IRQ
RAM
MOTO
TPOHC
TPOHD
TPOHF
RPOHC
RPOHD
RPOHF
RAMCI
AISCLK
RAIPD
TAIPD
TAIPC
TAIPF
PATH
OVERHEAD
I/O
ALARM
INTERFACE
PORT
STAI
ISTAT
PAIS
TRI
RECEIVE
RPOS
RNEG
RCLK
DCLK
DC1J1
DSPE
DECODE
BLOCK
DESTUFF
BLOCK
DESYNC
BLOCK
OUTPUT
BLOCK
DROP
BLOCK
8
DDATA(7-0)
DPAR
INTERNAL
AMPLIFIER
(FOR VCXO)
TCK
TMS
TDI
TRS
TDO
DC1
BOUNDARY
SCAN
AMPINN
AMPINP
AMPOUT
CTRL
XOSCI
FIFOERR
Figure 1. L3M TXC-03452B Block Diagram
TXC-03452B-MB
Ed. 6, April 2001
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