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EP20K200RC208-1 参数 Datasheet PDF下载

EP20K200RC208-1图片预览
型号: EP20K200RC208-1
PDF下载: 下载PDF文件 查看货源
内容描述: 现场可编程门阵列(FPGA)的\n [Field Programmable Gate Array (FPGA) ]
分类和应用: 现场可编程门阵列
文件页数/大小: 114 页 / 1501 K
品牌: ETC [ ETC ]
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APEX 20K Programmable Logic Device Family Data Sheet  
Notes to tables:  
(1) See the Operating Requirements for Altera Devices Data Sheet.  
(2) Minimum DC input is 0.5 V. During transitions, the inputs may undershoot to 2.0 V or overshoot to 5.75 V for  
input currents less than 100 mA and periods shorter than 20 ns.  
(3) Numbers in parentheses are for industrial-temperature-range devices.  
(4) Maximum V rise time is 100 ms, and V must rise monotonically.  
CC  
CC  
(5) All pins, including dedicated inputs, clock I/ O, and JTAG pins, may be driven before V  
powered.  
and V  
are  
CCIO  
CCINT  
(6) Typical values are for T = 25° C, VCCINT = 2.5 V, and VCCIO = 2.5 or 3.3 V.  
A
(7) These values are specified in the APEX 20K device recommended operating conditions, shown in Table 26 on  
page 62.  
(8) The APEX 20K input buffers are compatible with 2.5-V and 3.3-V (LVTTL and LVCMOS) signals. Additionally, the  
input buffers are 3.3-V PCI compliant when V  
and V  
meet the relationship shown in Figure 33 on page 68.  
CCIO  
CCINT  
(9) The I  
parameter refers to high-level TTL, PCI or CMOS output current.  
OH  
(10) The I parameter refers to low-level TTL, PCI, or CMOS output current. This parameter applies to open-drain pins  
OL  
as well as output pins.  
(11) This value is specified for normal device operation. The value may vary during power-up.  
(12) Pin pull-up resistance values will be lower if an external source drives the pin higher than V  
(13) Capacitance is sample-tested only.  
.
CCIO  
Tables 31 through 34 provide information on absolute maximum ratings,  
recommended operating conditions, DC operating conditions, and  
capacitance for 1.8-V APEX 20KE devices.  
Table 31. APEX 20KE Device Absolute Maximum Ratings  
Note (1)  
Symbol  
Parameter  
Conditions  
Min  
Max  
Unit  
VCCINT  
VCCIO  
VI  
Supply voltage  
With respect to ground (2)  
0.5  
0.5  
0.5  
25  
65  
65  
2.5  
4.6  
4.6  
25  
V
V
DC input voltage  
V
IOUT  
TSTG  
TAMB  
TJ  
DC output current, per pin  
Storage temperature  
Ambient temperature  
Junction temperature  
mA  
° C  
° C  
° C  
No bias  
150  
135  
135  
Under bias  
PQFP, RQFP, TQFP, and BGA packages,  
under bias  
Ceramic PGA packages, under bias  
150  
° C  
Altera Corporation  
65  
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