APEX 20K Programmable Logic Device Family Data Sheet
Table 25. APEX 20K Device DC Operating Conditions (Part 2 of 2)
Notes (6), (7)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VOL
3.3-V low-level LVTTL output
voltage
IOL = 12 mA DC,
0.4
V
VCCIO = 3.00 V (10)
3.3-V low-level LVCMOS output
voltage
I
OL = 0.1 mA DC,
CCIO = 3.00 V (10)
0.2
V
V
V
3.3-V low-level PCI output voltage IOL = 1.5 mA DC,
0.1 × VCCIO
V
CCIO = 3.00 to 3.60 V
(10)
2.5-V low-level output voltage
I
OL = 0.1 mA DC,
VCCIO = 2.30 V (10)
OL = 1 mA DC,
CCIO = 2.30 V (10)
IOL = 2 mA DC,
CCIO = 2.30 V (10)
VI = 4.1 to –0.5 V (11)
Tri-stated I/O pin leakage current VO = 4.1 to –0.5 V (11)
0.2
0.4
0.7
V
V
V
I
V
V
II
Input pin leakage current
–10
–10
10
10
µA
µA
IOZ
ICC0
VCC supply current (standby)
(All ESBs in power-down mode)
VI = ground, no load, no
toggling inputs, -1 speed
grade
10
5
mA
VI = ground, no load, no
toggling inputs,
mA
-2, -3 speed grades
RCONF
Value of I/O pin pull-up resistor
before and during configuration
VCCIO = 3.0 V (12)
20
30
50
80
k¾
k¾
VCCIO = 2.375 V (12)
Table 26. APEX 20K Device Capacitance
Note (13)
Symbol
Parameter
Conditions
Min
Max
Unit
CIN
Input capacitance
VIN = 0 V, f = 1.0 MHz
VIN = 0 V, f = 1.0 MHz
8
pF
pF
CINCLK
Input capacitance on dedicated
clock pin
12
COUT
Output capacitance
VOUT = 0 V, f = 1.0 MHz
8
pF
Altera Corporation
61
ETC [ ETC ]
