Chapter 4
Register Descriptions
This chapter describes registers used to configure and monitor the
L64777.
The sections in this chapter are:
•
•
Section 4.1, “Group 2 General-Purpose Registers,” page 4-1
Section 4.2, “NCO-Related Registers,” page 4-10
4.1 Group 2 General-Purpose Registers
The registers listed in Table 4.1 and described subsequently comprise
the Group 2 registers. These registers configure and monitor the
operations of the L64777. (Note that the L64777 does not use Groups 1,
3–7.) The filter coefficient register A0 is a sequential input register, which
sequentially shifts in the 196 bytes of filter coefficients. Therefore, the
external microprocessor must make exactly 196 accesses to that
register. To verify the filter coefficients, read back the contents of
Register 0 after writing each coefficient. This does not influence the shift
register shift operation. The remaining registers can be either loaded or
read back at random. The address is specified by writing it into the
Group 0 Address Pointer register.
All 43 registers of the L64777 are 8-bit. Table 4.1 provides an overview
of the bit allocations for the L64777 registers. Note that an R in column
A indicates a read-only register; an RW indicates a read/write register.
L64777 DVB QAM Modulator Technical Manual
4-1
ETC [ ETC ]
