Table 4.1
Group 2 Bit Allocation
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
A
FCOEFF.7 FCOEFF.6 FCOEFF.5 FCOEFF.4 FCOEFF.3 FCOEFF.2 FCOEFF.1 FCOEFF.0 R/W 0
FREQ_PHA
SERIN
NEWSYNC EXTSYNC
PLLSET
MSIZE.2
MSIZE.1
MSIZE.0 R/W 1
SE
RESERVED
SMAG
FDEL.6
RESERVED
SYNC_
FDEL.5
IQ_EX
SYNC_
FDEL.4
FDEL.3
FDEL.2
RS_OFF
SYNC_
FDEL.1
FDEL.0 R/W 2
RESERVED SCR_OFF
SYNC_ SYNC_
INT_OFF RESERVED R/W 3
SYNC_
SYNC_
SYNC_
R/W 4
R/W 5
LENGTH.7 LENGTH.6 LENGTH.5 LENGTH.4 LENGTH.3 LENGTH.2 LENGTH.1 LENGTH.0
SYNC_
BYTE.7
SYNC_
BYTE.6
SYNC_
BYTE.5
SYNC_
BYTE.4
SYNC_
BYTE.3
SYNC_
BYTE.2
SYNC_
BYTE.1
SYNC_
BYTE.0
AUTO-
RESET
PLL_INV
IRAM_OFF FIFO_OFF DIFF_OFF MAP_OFF
ICNT_O.5 ICNT_O.4 ICNT_O.3 ICNT_O.2
AMPL
RESERVED R/W 6
ICNT_O.7
ICNT_O.6
ICNT_O.1
ICNT_O.0 R/W 7
ICNT_O.8 R/W 8
ICNT_I.0 R/W 9
RESERVED ICNT_O.14 ICNT_O.13 ICNT_O.12 ICNT_O.11 ICNT_O.10 ICNT_O.9
ICNT_I.7
ICNT_I.6
ICNT_I.5
ICNT_I.4
ICNT_I.3
ICNT_I.2
ICNT_I.1
ICNT_I.9
R/W
ICNT_I.8
10
RESERVED I_ICNT_I.14 ICNT_I.13
ICNT_I.12
ICNT_I.11
ICNT_I.10
TRACK-
STEPS.1
TRACK-
STEPS.0 STR. INPUT
UNCON-
R/W
GAP.4
GAP.3
GAP.2
GAP.1
GAP.0
11
FIFO_
SYNCOK_
ALARM_
ERF_
STORE
NCO
EVENT
MASK_
SYNCOK
MASK_FIFO R/W
SYNCOK
MASK_ERF
STORE
_ALARM
12
STORE
AUTO_
ACQUI_
RUNNING
BELOW_ MEASURE_
STEP_
UPDATE
ACQ_STATE ACQ_STATE ACQ_STATE
RESERVED
R 13
THRES
DONE
.2
.1
.0
START
RESERVED MEASURE-
MENT
AUTO_
ACQUISITIO
N_ON
ENABLE_ MASK_NCO
MASK_ACQ EN_PHASE
R/W
14
FIFO_INT
NCO_LOOP
_IRQ
_IRQ
TEST.2
_LOOP
TEST.1
R/W
15
TEST.7
TEST.6
TEST.5
TEST.4
TEST.3
TEST.0
R/W
16
INISTEP.7
INISTEP.6
INISTEP.5
INISTEP.4
INISTEP.3
INISTEP.2
INISTEP.1
INISTEP.0
INISTEP.8
R/W
17
INISTEP.15 INISTEP.14 INISTEP.13 INISTEP.12 INISTEP.11 INISTEP.10 INISTEP.9
R/W
18
INISTEP.23 INISTEP.22 INISTEP.21 INISTEP.20 INISTEP.19 INISTEP.18 INISTEP.17 INISTEP.16
NCO_GAIN. NCO_GAIN. NCO_GAIN. NCO_GAIN. NCO_GAIN. NCO_GAIN. NCO_GAIN. NCO_GAIN. R/W
19
7
6
5
4
3
2
1
0
NCO_GAIN. NCO_GAIN. NCO_GAIN. NCO_GAIN. NCO_GAIN. NCO_GAIN. NCO_GAIN. NCO_GAIN. R/W
15 14 13 12 11 10 20
9
8
4-2
Register Descriptions
ETC [ ETC ]
