Figure A.5 Single Read from Slave
Start
Condition
Start
Condition
Stop
19
Condition
Start
Condition
12
1
7
SCL
SDA
ACK
(Slave)
ACK
(Slave)
ACK
(Slave)
ACK
(Slave)
ACK
(Slave)
ACK
ACK
R/W
3
R/W
9
R/W
(Slave)
(Master)
4
5
6
13
14 15
16 17 18
8
10 11
2
7-bit Slave
Address
8-bit Group
Address
7-bit Slave
Address
7-bit Slave
Address
8-bit Group
Address
8-bit Data
8-bit Data
SDA
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Bit 7 Bit 6 Bit 5
A.5 Limitations
You can access the internal registers either in bursts or single-byte
operation. You must access the status registers 12 and 13 as single-byte
read or write.
After a stop condition, the user must program the APR to the desired
next access address. Do not rely on the expected location after the last
access.
Limitations
A-7
ETC [ ETC ]
