Functional Description
Figure 4-8. External Glue Logic Drives CPU Clock Ratio Straps
1
2
HCLK
SUS_DIS strap
↑
Suspend disable value latched when PCIRST#
PCIRST#
0
0
1
2
33,333
PCLK
....
p_creset#
1 ms
CRESET#
CPU strap values from external Glue Logic
CPU straps
4.8.2.3
82443BX Straps
The 82443BX strapping options are latched in the rising edge of PCIRST#.
4.8.3
Suspend Resume
4.8.3.1
Suspend Resume protocols
The suspend resume sequences are indicated to the 82443BX by the PIIX4E, using SUS_STAT#,
and PCIRST#. In addition, the 82443BX contains NREF_EN and CRst_En configuration bits that
participate in the suspend resume sequences. As a result of suspend resume, the 82443BX performs
the following activities: Changing its refresh mode, performing internal and CPU reset and Isolate
or re-enable normal IO buffers.
Table 4-17. Suspend / Resume Events and Activities
IO
State
SUSTAT# PCIRST# CrstEn
RESET
REFRESH
BUFFERS
ON
assert
inactive
active
-
-
-
switch to suspend refresh
isolate
enable
suspend refresh
NREF_EN remains
inactive
reset exclude
resume/ref logic
POSCL/STR
deassert
auto switch to normal ref
NREF_EN is set
POS
deassert
deassert
inactive
inactive
0
1
no resets
enable
enable
auto switch to normal ref
NREF_EN is set
POSCCL
reset CPU only
4.8.3.2
Suspend Refresh
Suspend Refresh Modes
The 82443BX supports suspend refresh by providing a mechanism to transition in and out of
suspend. The supported suspend refresh types are:
• Self Refresh when SDRAM are used
• Self Refresh when EDO -DRAMs are used
• CBR Refresh when EDO-DRAMs are used
4-34
82443BX Host Bridge Datasheet