Functional Description
Low-Power Modes Supported by the 82443BX
The 82443BX supports a variety of system-wide low power modes using the following functions:
• Hardware interface with PIIX4E is used to indicate:
— Suspend mode entry.
— Resume from suspend.
— Whether to reset “resume logic” during resume from Suspend to Disk (STD).
— Whether to automatically switch from suspend to normal refresh
• Automatic transition from normal to suspend refresh.
• Optional automatic transition from suspend to normal refresh.
• Optional CPU reset during resume from Power On Suspend (POS).
• Variety of Suspend refresh types:
— Self Refresh for SDRAMs.
— Optional Self Refresh for EDO.
— Optional CAS Before RAS (CBR) refresh for EDO. Integrated Ring oscillator is used to
provide the time base for the associated logic.
— Programmable slow refresh, relevant for CBR refresh only.
• I/O pins isolation to significantly reduce power consumption while in POS and STR modes.
Based on the above functions, the 82443BX distinguishes the following system-wide low power
modes:
• STR and POS suspend entry and exit are generally handled in the same manner. The following
exceptions are related to POS:
— POS resume sequence may or may not include CPU reset. STR, with PCIRST# active
always includes CPU reset.
— POS resume sequence requires hardware transition from suspend to normal refresh. STR,
with PCIRST# active requires software initiated transition.
• STD resume is handled the same as power on sequence, including complete reset of 82443BX
state.
Clock Control Functions Supported by 82443BX
• Internal clock gating: this function allows the 82443BX to gate the clock to the majority of its
logic while there is no pending events to handle.
• The Primary PCI bus includes the support of the CLKRUN#, which enables the PIIX4E to
dynamically disable the primary PCICLK and for the 82443BX and PCI peripheral to re-
enable the clock when it is needed to perform a transaction.
• When an AGP port is not available on the system, a strapping option allows the 82443BX to
permanently disable all clocks associated with AGP logic.
82443BX Host Bridge Datasheet
4-29
ETC [ ETC ]
