VS1001K
VLSI
DATASHEET
y
Solution
6. SPI BUSES
Word read is shown in Figure 7.
XCS
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17
30 31
SCK
0
0
0
0
0
0
1
1
7
6
5
4
3
2
1
0
don’t care
SI
instruction (READ)
high impedance
address
data out
15 14
1
0
X
SO
Figure 7: SCI Word Read
6.4.3 SCI Write
VS1001k registers are written by the following sequence. First, XCS line is pulled low to select the
device. Then the WRITE opcode (0x2) is transmitted via the SI line followed by an 8-bit word address.
After the word has been shifted in, XCS should be pulled high to end the WRITE sequence. XCS low to
high transition must occur after SCLK high to low transition corresponding to LSB of the last word.
Single word write is shown in Figure 8.
XCS
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17
29 30 31
SCK
0
0
0
0
0
0
1
0
7
6
5
4
3
2
1
0
15 14
2
1
0
don’t care
SI
instruction (WRITE)
address
data in
Figure 8: SCI Word Write
Version 4.11, 2003-09-18
18
ETC [ ETC ]
