Figure 5.6 Example of External Clock Input ................................................................................71
Figure 5.7 Block Diagram of Subclock Generator .......................................................................72
Figure 5.8 Typical Connection to 32.768-kHz Crystal Resonator................................................72
Figure 5.9 Equivalent Circuit of 32.768-kHz Crystal Resonator..................................................72
Figure 5.10 Pin Connection when not Using Subclock ................................................................73
Figure 5.11 Example of Incorrect Board Design ...........................................................................74
Section 6 Power-Down Modes
Figure 6.1 Mode Transition Diagram ...........................................................................................81
Section 7 ROM
Figure 7.1 Flash Memory Block Configuration............................................................................88
Figure 7.2 Programming/Erasing Flowchart Example in User Program Mode............................96
Figure 7.3 Program/Program-Verify Flowchart............................................................................98
Figure 7.4 Erase/Erase-Verify Flowchart ...................................................................................101
Section 9 I/O Ports
Figure 9.1 Port 1 Pin Configuration............................................................................................107
Figure 9.2 Port 2 Pin Configuration............................................................................................113
Figure 9.3 Port 3 Pin Configuration............................................................................................116
Figure 9.4 Port 5 Pin Configuration............................................................................................119
Figure 9.5 Port 6 Pin Configuration............................................................................................125
Figure 9.6 Port 7 Pin Configuration............................................................................................130
Figure 9.7 Port 8 Pin Configuration............................................................................................133
Figure 9.8 Port B Pin Configuration...........................................................................................135
Section 10 Realtime Clock (RTC)
Figure 10.1 Block Diagram of RTC ...........................................................................................138
Figure 10.2 Definition of Time Expression ................................................................................143
Figure 10.3 Initial Setting Procedure..........................................................................................146
Figure 10.4 Example: Reading of Inaccurate Time Data............................................................147
Section 11 Timer B1
Figure 11.1 Block Diagram of Timer B1....................................................................................149
Section 12 Timer V
Figure 12.1 Block Diagram of Timer V......................................................................................156
Figure 12.2 Increment Timing with Internal Clock ....................................................................162
Figure 12.3 Increment Timing with External Clock...................................................................163
Figure 12.4 OVF Set Timing......................................................................................................163
Figure 12.5 CMFA and CMFB Set Timing................................................................................163
Figure 12.6 TMOV Output Timing ............................................................................................164
Figure 12.7 Clear Timing by Compare Match............................................................................164
Figure 12.8 Clear Timing by TMRIV Input ...............................................................................164
Figure 12.9 Pulse Output Example.............................................................................................165
Figure 12.10 Example of Pulse Output Synchronized to TRGV Input.......................................166
Rev. 3.00, 05/03, page xx of xxx
ETC [ ETC ]
