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CXD3018Q/R 参数 Datasheet PDF下载

CXD3018Q/R图片预览
型号: CXD3018Q/R
PDF下载: 下载PDF文件 查看货源
内容描述: CD数字信号处理器,内置DigitalServo和DAC [CD Digital Signal Processor with Built-in DigitalServo and DAC ]
分类和应用: 数字信号处理器
文件页数/大小: 134 页 / 942 K
品牌: ETC [ ETC ]
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CXD3018Q/R  
Pin No.  
Output  
values  
I/O  
Symbol  
Description  
CXD  
CXD  
3018R  
3018Q  
98  
100 RMUT  
O
O
1, 0  
1, 0  
R ch zero detection flag.  
L ch zero detection flag.  
99  
1
2
LMUT  
NC  
100  
Notes) • PCMD is a MSB first, two's complement output.  
GTOP is used to monitor the frame sync protection status. (High: sync protection window released.)  
XUGF is the frame sync obtained from the EFM signal, and is negative pulse. It is the signal before  
sync protection.  
XPCK is the inverse of the EFM PLL clock. The PLL is designed so that the falling edge and the EFM  
signal transition point coincide.  
The GFS signal goes high when the frame sync and the insertion timing match.  
RFCK is derived from the crystal accuracy, and has a cycle of 136µs.  
C2PO represents the data error status.  
XROF is generated when the 16K RAM exceeds the ±4 frame jitter margin.  
Monitor Pin Output Combinations  
Command bit  
Output data  
MTSL1 MTSL0  
GFS  
C2PO  
C2PO  
GTOP  
0
0
1
0
1
0
XPCK  
MNT0  
XPCK  
XUGF  
MNT1  
RFCK  
MNT3  
XROF  
8 –  
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