CXD3018Q/R
Pin No.
Output
values
I/O
Symbol
Description
CXD
CXD
3018R
3018Q
67
69
70
71
72
73
74
75
76
77
78
79
AVDD3
VCTL
VCKI
V16M
VPCO
VSS
—
I
—
Analog power supply.
68
Wide-band EFM PLL VCO2 control voltage input.
Wide-band EFM PLL VCO2 oscillation input.
Wide-band EFM PLL VCO2 oscillation output.
69
I
70
O
O
—
I
1, 0
71
1, Z, 0 Wide-band EFM PLL charge pump output.
72
—
Digital GND.
73
TES2
VDD
Test pin. Normally GND.
Digital power supply.
74
—
O
O
I
—
75
DOUT
LRCK
KRCKI
1, 0
1, 0
Digital Out output.
76
D/A interface. LR clock output f = Fs.
D/A interface. LR clock input.
77
D/A interface. Serial data output.
(two's complement, MSB first)
78
79
80
81
PCMD
PCMDI
O
I
1, 0
D/A interface. Serial data input.
(two's complement, MSB first)
80
81
82
83
BCK
O
I
1, 0
1, 0
D/A interface. Bit clock output.
D/A interface. Bit clock input.
BCKI
Outputs a high signal when the playback disc has emphasis, and a
low signal when there is no emphasis.
82
84
EMPH
O
Inputs a high signal when de-emphasis is on, and a low signal when
de-emphasis is off.
83
84
85
85
86
87
EMPHI
XVDD
XTAI
I
—
I
—
Master clock power supply.
Crystal oscillation circuit input. Master clock is externally input from
this pin.
86
87
88
89
90
91
92
93
94
95
96
97
88
89
90
91
92
93
94
95
96
97
98
99
XTAO
XVSS
O
—
—
O
I
Crystal oscillation circuit output.
Master clock GND.
—
—
AVDD1
AOUT1
AIN1
Analog power supply.
L ch analog output.
L ch operational amplifier input.
L ch LINE output.
LOUT1
AVSS1
AVSS2
LOUT2
AIN2
O
—
—
O
I
—
—
Analog GND.
Analog GND.
R ch LINE output.
R ch operational amplifier output.
R ch analog output.
AOUT2
AVDD2
O
—
—
Analog power supply.
– 7 –
ETC [ ETC ]
