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CXD3018Q/R 参数 Datasheet PDF下载

CXD3018Q/R图片预览
型号: CXD3018Q/R
PDF下载: 下载PDF文件 查看货源
内容描述: CD数字信号处理器,内置DigitalServo和DAC [CD Digital Signal Processor with Built-in DigitalServo and DAC ]
分类和应用: 数字信号处理器
文件页数/大小: 134 页 / 942 K
品牌: ETC [ ETC ]
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CXD3018Q/R  
$3F (preset: $3F 00 10)  
D15 D14 D13 D12 D11 D10 D9  
D8  
D7  
0
D6  
D5  
D4  
1
D3  
D2  
0
D1  
D0  
0
AGG4 XT4D XT2D AGSD DRR2 DRR1 DRR0  
ASFG FTQ  
SRO1  
AGHF ASOT  
AGG4:  
This varies the amplitude of the internally generated sine wave using the AGGF and AGGT  
commands during AGC.  
When AGG4 = 0, the default is used. When AGG4 = 1, the setting is as shown in the table below.  
Sin wave amplitude  
See $37 for AGGF and AGGT.  
The presets are AGG4 = 0,  
AGGF = 1 and AGGT = 1.  
AGG4 AGGF AGGT  
FE input  
conversion  
TE input  
conversion  
0
1
0
1/32 × VDD/2  
1/16 × VDD/2  
0
1
0
1/16 × VDD/2  
1/8 × VDD/2  
1
0
1/64 × VDD/2  
0
1
1/32 × VDD/2  
1
0
1/16 × VDD/2  
1
1
1/8 × VDD/2  
: preset, : don't care  
XT4D, XT2D: MCK (digital servo master clock) frequency division ratio setting  
This command forcibly sets the frequency division ratio to 1/4, 1/2 or 1/1 when MCK is generated.  
See the description of $3E for XT1D. Also, see "§5-2. Digital Servo Block Master Clock (MCK)".  
XT1D  
XT2D  
XT4D  
Frequency division ratio  
0
1
0
0
0
1
0
1
According to XTSL  
1/1  
1/2  
0
1/4  
: preset, : don't care  
AGSD:  
This command is used to determine whether the result of the tracking auto gain adjustment is  
reflected on the sled. See §5-6 for the auto gain adjustment.  
When AGSD = 0, the result of the tracking auto gain adjustment is reflected on the sled.  
In other words, the coefficient K07 = K23. (preset)  
When AGSD = 1, the result of the tracking auto gain adjustment is not reflected on the sled.  
In other words, the coefficient K07 is not affected by K23.  
120 –  
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