CXD3018Q/R
When $3A command SVDA = 1
DAC:
This command selects whether to set readout data for the left or right channel.
When 0, right channel readout data is selected. (default)
When 1, left channel readout data is selected.
SD6 to SD0:
These bits select the data to be output from the left or right channel.
D14 D13 D12 D11 D10 D9
D8
Readout data
length
Readout data
Data RAM data
SD6 SD5 SD4 SD3 SD2 SD1 SD0
1
0
0
0
0
0
0
0
0
0
0
0
Data RAM address
16 bits
8 bits
8 bits
9 bits
9 bits
9 bits
9 bits
9 bits
8 bits
8 bits
8 bits
8 bits
: don't care
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
1
1
1
1
1
0
1
0
0
0
0
1
1
0
0
1
0
1
0
RF AVRG register
RFDC input signal
FCS bias register
TRVSC register
VC AVRG register
FE AVRG register
TE AVRG register
FE input signal
1
2
1
1
0
0
1
0
1
0
TE input signal
SE input signal
VC input signal
1
2
Right channel preset
Left channel preset
Note) Coefficient RAM data cannot be output from the audio DAC side.
Do not output RFDC (peak, bottom, peak-bottom) or the DFCT count from the audio
DAC side.
When $3A SVDA is changed, select the readout data again.
– 112 –
ETC [ ETC ]
