ZMD31020
Sensor Signal Conditioner
Datasheet
2.5 Analog Input Channel
ZMD31020’s block schematic in section 2.1 shows the structure of the analog input channel. The signal path for
the sensor signal as well as for temperature is fully differential up to the ADC. The analog multiplexer provides a
cost-effective, sequential conversion by a common ADC. Each signal path can be separated from the source at
it‘s input and can be short-circuit there for offset-cancellation purposes; for more details see the ZMD31020
Functional Description.
2.5.1 Bridge Polarity Setting
The sensor signal path features a cross-switch to reverse the polarity of the bridge sensor signal.
BP – configuration bit 4 – sets the bridge polarity as follows:
BP Differential signal
0
1
VBR_P – VBR_N
VBR_N – VBR_P
2.5.2 Programmable Gain Amplifier PGA
The PGA realizes a coarse sensitivity adaptation of the bridge sensor signal in several amplification steps
(sensitivity fine-tuning takes place later in the CMC). Three different gains can be set by G0 and G1 -
configuration bits 2 and 3 - as follows:
G1 G0
Gain aIN
0
1
1
x
0
1
15.66
24
42
The chopper-stabilisation of the PGA reduces the signal noise and is enabled by CH - configuration bit 6:
CH Chopper-stabilisation
0
1
Disabled
Enabled
2.5.3 Analog-to-digital Converter ADC
The ADC is a first order charge balancing analog-to-digital converter in full differential switched capacitor
technology. The amplified bridge sensor signal is converted by the ADC with full 12 bits resolution against a
reference voltage of 0.96 (VDDA – VSSA). As both the signal to be measured as well as the reference voltage, it is
measured against, are ratiometric to supply voltage (VDDA - VSSA), the ADC’s conversion result is insensitive
to supply-tolerances and -instabilities. In addition, the ADC realizes a coarse offset compensation (ADC-Range-
Shift RSADC) of the bridge sensor signal (offset fine-tuning takes place afterwards in the CMC).
RSADC can be set as follows:
O1 O0
RSADC (*)
(*) ADC-Range-Shift, related to the maximum processable sensor
signal span (former name was “CRROB”)
0
0
1
1
0
1
0
1
15/16
7/8
3/4
1/2
Copyright © 2004, ZMD AG, Rev. 1.6, 2005-05-19
6/19
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior
written consent of the copyright owner. The Information furnished in this publication is preliminary and subject to changes without notice.
ZMD [ Zentrum Mikroelektronik Dresden AG ]
