ZMD31020
Sensor Signal Conditioner
Datasheet
2.10 The Analog Output Stage
ZMD31020‘s analog output stage consists of an 11-bit resistor-string linear DAC, which converts the MSB-
portion of the corrected sensor signal, followed by an output buffer amplifier, designed for full supply voltage
range output swing and generating the output voltage VOUT
.
VOUT presents the actual corrected sensor signal as an analog voltage on a linear voltage scale with 11 bits
resolution. The output voltage is ratiometric to the supply voltage (VDDA – VSSA).
Furthermore it exhibits low- and high-side scale limits; either limit is programmable and clamping to these limit
values is performed digitally by the CMC (see section 2.7 and the ZMD31020 Functional Description).
VOUT will change as corrected sensor signal values become available, hence with a refresh rate of about 10ms.
VOUT can source/sink a maximum load current of 2mA.
3. ELECTRICAL SPECIFICATION
(all voltages referred to VSSA)
3.1 Absolute maximum ratings
PARAMETER
SYMBOL
VDDA
VDD
CONDITIONS
MIN
-0.3
-0.3
-0.3
-0.3
TYP
MAX
6.5
UNIT
Analog supply voltage
Digital supply voltage
Voltage at all digital I/O
Voltage at all analog I/O
V
V
V
V
to VSS
to VSS
6.5
VD_I/O
VDD+0.3
VDDA+0.3
VA_I/O
Guaranteed
at all pins, HBM
at all pins
-2
2
kV
ESD-immunity
Guaranteed
latch-up immunity
-100
100
mA
Storage temperature
TSTG
-40
150
100
°C
°C
Average storage- and
operation temperature for
15 years time of
operation
3.2 Operating Conditions
PARAMETER
Supply voltage
SYMBOL
CONDITIONS
MIN
TYP
MAX
5.5
UNIT
V
VDDA = VDD
TAMB
to VSSA = VSS
4.5
-40
1
5
Ambient temperature
Bridge resistance
Capacitance
125
10
°C
RBR
kΩ
CVDD(A)
between VDD = VDDA
and VSS = VSSA
100
220
470
nF
Copyright © 2004, ZMD AG, Rev. 1.6, 2005-05-19
10/19
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior
written consent of the copyright owner. The Information furnished in this publication is preliminary and subject to changes without notice.