Z8 Encore!® Motor Control Flash MCUs
Product Specification
192
I2C Mode Register
The I2C Mode Register, Table 101, provides control over master versus slave operating
mode, slave address and diagnostic modes.
2
Table 101. I C Mode Register (I2CMODE)
BITS
FIELD
RESET
R/W
7
6
5
4
IRM
3
GCE
2
1
0
Reserved
MODE[1:0]
SLA[9:8]
0
DIAG
0
0
0
0
0
R
R/W
R/W
R/W
R/W
R/W
F56H
ADDR
MODE—Selects the I2C Controller operational mode
00 = Master/Slave capable (supports multi-Master arbitration) with 7-bit Slave address
01 = Master/Slave capable (supports multi-Master arbitration) with 10-bit Slave address
10 = Slave Only capable with 7-bit address
11 = Slave Only capable with 10-bit address
IRM—Interactive Receive Mode
Valid in Slave mode when software needs to interpret each received byte before acknowl-
edging. This bit is useful for processing the data bytes following a General Call Address or
if software wants to disable hardware address recognition.
0 = Acknowledge occurs automatically and is determined by the value of the NAKbit of
the I2CCTL register.
1 = A receive interrupt is generated for each byte received (address or data). The SCL is
held Low during the acknowledge cycle until software writes to the I2CCTL register. The
value written to the NAKbit of the I2CCTL register is output on SDA. This value allows
software to Acknowledge or Not Acknowledge after interpreting the associated address/
data byte.
GCE—General Call Address Enable
Enables reception of messages beginning with the General Call Address or START byte.
0 = Do not accept a message with the General Call Address or START byte.
1 = Do accept a message with the General Call Address or START byte. When an address
match occurs, the GCA and RD bits in the I2C Status register indicates whether the
address matched the General Call Address/START byte or not. Following the General Call
Address byte, software may set the IRMbit that allows software to examine the following
data byte(s) before acknowledging.
SLA[9:8]— Slave Address Bits 9 and 8.
Initialize with the appropriate Slave address value when using 10-bit Slave addressing.
These bits are ignored when using 7-bit Slave addressing.
DIAG—Diagnostic Mode
Selects read back value of the Baud Rate Reload and State registers.
I2C Master/Slave Controller
P R E L I M I N A R Y
PS024604-1005
ZILOG [ ZILOG, INC. ]
