Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
Z8 Encore!®
87
UARTx Receive Data Register
Data bytes received through the RXDx pin are stored in the UARTx Receive Data register
(Table 51). The Read-only UARTx Receive Data register shares a Register File address
with the Write-only UARTx Transmit Data register.
Table 51. UARTx Receive Data Register (UxRXD)
BITS
FIELD
RESET
R/W
7
6
5
4
3
2
1
0
RXD
X
R
X
R
X
R
X
R
X
R
X
R
X
R
X
R
F40H and F48H
ADDR
RXD—Receive Data
UART receiver data byte from the RXDx pin
UARTx Status 0 and Status 1 Registers
The UARTx Status 0 and Status 1 registers (Table 52 and 53) identify the current UART
operating configuration and status.
Table 52. UARTx Status 0 Register (UxSTAT0)
BITS
FIELD
RESET
R/W
7
6
5
4
3
2
1
0
RDA
PE
OE
FE
BRKD
TDRE
TXE
CTS
0
0
0
0
0
1
1
X
R
R
R
R
R
R
R
R
F41H and F49H
ADDR
RDA—Receive Data Available
This bit indicates that the UART Receive Data register has received data. Reading the
UART Receive Data register clears this bit.
0 = The UART Receive Data register is empty.
1 = There is a byte in the UART Receive Data register.
PE—Parity Error
This bit indicates that a parity error has occurred. Reading the UART Receive Data regis-
ter clears this bit.
PS017610-0404
UART
ZILOG [ ZILOG, INC. ]
