Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
Z8 Encore!®
83
7. Write to the UART Control 0 register to:
–
–
Set the receive enable bit (REN) to enable the UART for data reception
Enable parity, if desired, and select either even or odd parity.
8. Execute an EI instruction to enable interrupts.
The UART is now configured for interrupt-driven data reception. When the UART
Receiver interrupt is detected, the associated interrupt service routine (ISR) should per-
form the following:
9. Check the UART Status 0 register to determine the source of the interrupt - error,
break, or received data.
10. If the interrupt was due to data available, read the data from the UART Receive Data
register. If operating in Multiprocessor (9-bit) mode, first read the Multiprocessor
Receive flag (MPRX) to determine if the data was directed to this UART before
reading the data.
11. Clear the UART Receiver interrupt in the applicable Interrupt Request register.
12. Execute the IRET instruction to return from the interrupt-service routine and await
more data.
Receiving Data using the Direct Memory Access Controller (DMA)
The DMA and UART can coordinate automatic data transfer from the UART Receive
Data register to general-purpose Register File RAM. This reduces the eZ8 CPU process-
ing overhead required to support UART data reception. The UART Receiver interrupt
must then only notify the eZ8 CPU of error conditions. Follow these steps to configure the
UART and DMA for automatic data handling:
1. Write to the DMA control registers to configure the DMA to transfer data from the
UART Receive Data register to general-purpose Register File RAM.
2. Write to the UART Baud Rate High and Low Byte registers to set the desired baud
rate.
3. Enable the UART pin functions by configuring the associated GPIO Port pins for
alternate function operation.
4. Write to the Interrupt control registers to enable the UART Receiver interrupt and set
the desired priority.
5. Write to the UART Control 1 register to:
–
–
Enable Multiprocessor (9-bit) mode functions, if desired.
Disable the UART interrupt for received data by clearing RDAIRQ to 0.
PS017610-0404
UART
ZILOG [ ZILOG, INC. ]
