Z8 Encore! XP® F08xA Seriess
Product Specification
85
Parity Checker
Receive Shifter
Receiver Control
with Address Compare
RXD
Receive Data
Register
Control Registers
System Bus
Transmit Data
Status Register
Baud Rate
Generator
Register
Transmit Shift
Register
TXD
Transmitter Control
Parity Generator
CTS
DE
Figure 9.UART Block Diagram
Operation
Data Format
The UART always transmits and receives data in an 8-bit data format, least-significant bit
first. An even or odd parity bit can be added to the data stream. Each character begins with
an active LowStartbit and ends with either 1 or 2 active High Stop bits. Figures 10 and
11 illustrates the asynchronous data format employed by the UART without parity and
with parity, respectively.
PS024705-0405
P R E L I M I N A R Y
UART
ZILOG [ ZILOG, INC. ]
