Z8 Encore! XP® 4K Series
Product Specification
46
Functions section.
1 = Port Alternate Function selected as defined in Tables 15 and 16 in the GPIO Alternate
Functions section.
Port A–D Alternate Function Set 2 Sub-Registers
The Port A–D Alternate Function Set 2 sub-register (Table 27) is accessed through the
Port A–D Control register by writing 08Hto the Port A–D Address register. The Alternate
Function Set 2 sub-registers selects the alternate function available at a port pin. Alternate
Functions selected by setting or clearing bits of this register is defined in Table 16 in the
section GPIO Alternate Functions on page 33.
Alternate function selection on port pins must also be enabled as decribed in Port A–D
Note:
Alternate Function Sub-Registers on page 42.
Table 27. Port A–D Alternate Function Set 2 Sub-Registers (PxAFS2)
BITS
7
6
5
4
3
2
1
0
PAFS27
PAFS26
PAFS25
PAFS24
PAFS23
PAFS22
PAFS21
PAFS20
FIELD
RESET
R/W
00H (all ports of 20/28 pin devices); 04H (Port A of 8-pin device)
R/W R/W R/W R/W R/W R/W
R/W
R/W
If 08H in Port A–D Address Register, accessible through the Port A–D Control Register
ADDR
PAFS2[7:0]—Port Alternate Function Set 2
0 = Port Alternate Function selected as defined in Table 16 GPIO Alternate Functions sec-
tion.
1 = Port Alternate Function selected as defined in Table 16 GPIO Alternate Functions sec-
tion.
Port A–C Input Data Registers
Reading from the Port A–C Input Data registers (Table 28) returns the sampled values
from the corresponding port pins. The Port A–C Input Data registers are read-only. The
value returned for any unused ports is 0. Unused ports include those missing on the 8- and
28-pin packages, as well as those missing on the ADC-enabled 28-pin packages.
Table 28. Port A–C Input Data Registers (PxIN)
BITS
7
PIN7
X
6
PIN6
X
5
PIN5
X
4
PIN4
X
3
PIN3
X
2
PIN2
X
1
PIN1
X
0
PIN0
X
FIELD
RESET
R/W
R
R
R
R
R
R
R
R
FD2H, FD6H, FDAH
ADDR
PS022815-0206
General-Purpose I/O
ZILOG [ ZILOG, INC. ]
