Z8 Encore! XP® 4K Series
Product Specification
47
PIN[7:0]—Port Input Data
Sampled data from the corresponding port pin input.
0 = Input data is logical 0 (Low).
1 = Input data is logical 1 (High).
Port A–D Output Data Register
The Port A–D Output Data register (Table 29) controls the output data to the pins.
Table 29. Port A–D Output Data Register (PxOUT)
BITS
7
6
5
4
3
2
1
0
POUT7
POUT6
POUT5
POUT4
POUT3
POUT2
POUT1
POUT0
FIELD
RESET
R/W
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
FD3H, FD7H, FDBH, FDFH
ADDR
POUT[7:0]—Port Output Data
These bits contain the data to be driven to the port pins. The values are only driven if the
corresponding pin is configured as an output and the pin is not configured for alternate
function operation.
0 = Drive a logical 0 (Low).
1= Drive a logical 1 (High). High value is not driven if the drain has been disabled by set-
ting the corresponding Port Output Control register bit to 1.
LED Drive Enable Register
The LED Drive Enable register (Table 30) activates the controlled current drive. The Port
C pin must first be enabled by setting the Alternate Function register to select the LED
function.
.
Table 30. LED Drive Enable (LEDEN)
BITS
7
6
5
4
3
2
1
0
LEDEN[7:0]
FIELD
RESET
R/W
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
F82H
ADDR
LEDEN[7:0]—LED Drive Enable
These bits determine which Port C pins are connected to an internal current sink.
PS022815-0206
General-Purpose I/O
ZILOG [ ZILOG, INC. ]
