Z8 Encore! XP® 4K Series
Product Specification
40
Table 16. Port Alternate Function Mapping (8-Pin Parts) (Continued)
Alternate
Function Select
Alternate Function Description Register AFS1
Alternate
FunctionSelect
Register AFS2
Port
Pin
Mnemonic
Reserved
AFS2[5]: 1
AFS1[5]: 0
Port A
(Cont)
Analog Functions* ADC/Comparator Input (P) LPO AFS2[5]: 1
Output
AFS1[5]: 1
* Analog Functions include ADC inputs, ADC reference, comparator inputs and LPO ports.
Note: Also, alternate function selection as described in Port A–D Alternate Function Sub-Registers on page 42
must be enabled.
GPIO Interrupts
Many of the GPIO port pins can be used as interrupt sources. Some port pins can be con-
figured to generate an interrupt request on either the rising edge or falling edge of the pin
input signal. Other port pin interrupt sources generate an interrupt when any edge occurs
(both rising and falling). Refer to the chapter Interrupt Controller on page 50 for more
information about interrupts using the GPIO pins.
GPIO Control Register Definitions
Four registers for each Port provide access to GPIO control, input data, and output data.
Table 17 lists these Port registers. Use the Port A–D Address and Control registers
together to provide access to sub-registers for Port configuration and control.
Table 17. GPIO Port Registers and Sub-Registers
Port Register Mnemonic
Port Register Name
PxADDR
Port A–D Address Register
(Selects sub-registers)
PxCTL
Port A–D Control Register
(Provides access to sub-registers)
PxIN
Port A–D Input Data Register
Port A–D Output Data Register
PxOUT
Port Sub-Register Mnemonic
Port Register Name
Data Direction
PxDD
PxAF
Alternate Function
PS022815-0206
General-Purpose I/O
ZILOG [ ZILOG, INC. ]
