Z86E30/E31/E40
Z8 4K OTP Microcontroller
Zilog
Z8 CONTROL REGISTER DIAGRAMS
R240
R243 PRE1
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
Reserved (Must be 0)
Count Mode
0
1
T1 Single Pass*
T1 Modulo N
Clock Source
Figure 45. Reserved
1
0
T1 Internal
T1 External Timing Input
(TIN Mode)
Prescaler Modulo
(Range: 1-64 Decimal
01-00 HEX)
R241 TMR
D7 D6 D5 D4 D3 D2 D1 D0
*Default After Reset
0
1
No Function*
Load T0
Figure 48. Prescaler 1 Register
F3H:Write Only
0
1
Disable T0 Count*
Enable T0 Count
0
1
No Function*
Load T1
R244 T0
D7 D6 D5 D4 D3 D2 D1 D0
0
1
Disable T1 Count*
Enable T1 Count
TIN Modes
00 External Clock Input*
01 Gate Input
10 Trigger Input
(Non-retriggerable)
11 Trigger Input
(Retriggerable)
T0 Initial Value
(When Written)
(Range: 1-256 Decimal
01-00 HEX)
T0 Current Value
(When Read)
TOUT Modes
00 Not Used*
01 T0 Out
10 T1 Out
11 Internal Clock Out
Figure 49. Counter/Timer 0 Register
F4H; Read/Write
Default After Reset = 00H
R245 PRE0
D7 D6 D5 D4 D3 D2 D1 D0
Figure 46. Timer Mode Register
F1H: Read/Write
Count Mode
0
1
T1 Single Pass
T1 Modulo N
R242 T1
D7 D6 D5 D4 D3 D2 D1 D0
Reserved (Must be 0)
Prescaler Modulo
(Range: 1-64 Decimal
01-00 HEX)
T1 Initial Value
(When Written)
(Range: 1-256 Decimal
01-00 HEX)
T1 Current Value
(When Read)
Figure 50. Prescaler 0 Register
F5H:Write Only
Figure 47. Counter/Timer 1 Register
F2H: Read/Write
58
P R E L I M I N A R Y
DS97Z8X0500
ZILOG [ ZILOG, INC. ]
