Z86E30/E31/E40
Z8 4K OTP Microcontroller
Zilog
/Reset
4 Clock
Filter
/Clear
CLK
18 Clock RESET
Generator
RESET
Internal
/RESET
WDT Select
(WDTMR)
WDT TAP SELECT
CLK Source
Select
(WDTMR)
5ms POR
CK
5ms
25ms 100ms
15ms
XTAL
M
U
X
WDT/POR Counter Chain
/CLR
Internal
RC OSC.
2V Operating
Voltage Det.
+
-
VDD
VLV
/WDT
From Stop
Mode
Recovery
Source
Stop Delay
Select (SMR)
Figure 34. Resets and WDT
Auto Reset Voltage. An on-board Voltage Comparator
checks that V is at the required level to ensure correct
CC
operation of the device. Reset is globally driven if V is
CC
below V (Figure 35).
LV
Note: V must be in the allowed operating range prior to
CC
the minimum Power-On Reset time-out (T
).
POR
48
P R E L I M I N A R Y
DS97Z8X0500
ZILOG [ ZILOG, INC. ]
