Z86E30/E31/E40
Z8 4K OTP Microcontroller
Zilog
EPROM MODE.
latched EPROM mode will remain until the EPM pin is re-
Table 14 shows the programming voltages of each pro-
gramming mode. Table 15, Figures 38, 39, and 40 show
the programming timing of each programming mode. Fig-
ure 41 shows the circuit diagram of a Z86E40 program-
ming adaptor, which adapts from 2764A to Z86E40. Fig-
ure 43 shows the flow-chart of an Intelligent Programming
Algorithm, which is compatible with 2764A EPROM
(Z86E40 is 4K EPROM, 2764A is 8K EPROM). Since the
EPROM size of Z86E30/E31/E40 differs from 2764A, the
programming address range has to be set from 0000H to
0FFFH for the Z86E30/E40 and 0000H to 07FFH for
Z86E31. Otherwise, the upper portion of EPROM data will
overwrite the lower portion of EPROM data. Figure 39
shows the adaptation from the 2764A to Z86E30/E31.
duced below V .
H
Mode Name
Mode #
LSB Addr
EPROM R/W
0
3
0000
0011
Option Bit R/W
EPROM R/W mode allows the programming of the user
mode program ROM.
Option Bit R/W allows the programming of the Z8 option
bits. When the device is latched into Option Bit R/W mode,
the address must then be changed to 63 decimals
(000000111111 Binary). The Options are mapped into this
address as follows:
Note: EPROM Protect feature allows the LDC, LDCI, LDE,
and LDEI instructions from internal program memory. A
ROM look-up table can be used with this feature.
Bit
7
Option
Unused
Unused
6
During programming, the V input pin supplies the pro-
PP
5
32 KHz XTAL Option
Permanent WDT
Auto Latch Disable
RC Oscillator Option
RAM Protect
gramming voltage and current to the EPROM. This pin is
also used to latch which EPROM mode is to be used (R/W
EPROM or R/W Option bits). The mode is set by placing
the correct mode number on the least significant bits of the
address and raising the EPM pin above V. After a setup
4
3
2
1
time, the V
pin can then be raised or lowered. The
PP
0
ROM Protect
Table 14 gives the proper conditions for EPROM R/W op-
erations, once the mode is latched.
Table 14. EPROM Programming Table
Programming
Modes
V
V
*
EPM
/CE
/OE
/PGM
ADDR
ADDR
ADDR
ADDR
ADDR
DATA
Out
Out
In
PP
CC
EPROM READ1
EPROM READ2
PROGRAM
X
X
V
V
V
V
V
V
V
V
V
V
V
V
4.5V†
5.5V†
6.4V
H
H
H
H
IL
IL
IL
IL
IL
IL
IH
IH
IH
V
V
V
PP
PP
IL
PROGRAM
VERIFY
V
V
V
Out
6.0V
IL
IH
OPTION BIT PGM
OPTION BIT READ
Notes:
V
V
V
V
V
V
V
63
63
IN
6.4V
6.0V
PP
H
IL
IH
IL
X
V
V
OUT
H
IL
IL
IH
V = 13.0 V ± 0.1 V
H
V
= As per specific Z8 DC specification.
IH
VIL= As per specific Z8 DC specification.
X=Not used, but must be set to V , V , or V level.
H
IH
IL
NU = Not used, but must be set to either V or V level.
IH
IL
I
I
during programming = 40 mA maximum.
PP
CC
during programming, verify, or read = 40 mA maximum.
*V has a tolerance of ±0.25V.
CC
† Zilog recommends an EPROM read at V = 4.5 V and 5.5 V to
CC
ensure proper device operations during the V after programming,
CC
but V = 5.0 V is acceptable.
CC
50
P R E L I M I N A R Y
DS97Z8X0500
ZILOG [ ZILOG, INC. ]
