Z8018x Family
MPU User Manual
64
MMU Common/
Bank Area
4
4
12
0
11
15
Logical
Address
(64K)
Register
4
D7 — D4
MMU Common/
Bank Area
Register
Comparator
D3 — D0
MMU Common Base Reg.
MMU Bank Base Reg.
4
8
0 0 0 0 0 0 0 0
Adder
8
(19) 18
11
0
0
12
Physical
Address
(512 k or 1 M)
Figure 29. Physical Address Generation
15
12 11
Logical
Address
(64 k)
(7)
43
0
Base Register
(8 bit)
(1 M)
(19) 18 16 15
12 11
0
Physical
Address
Figure 30. Physical Address Generation 2
UM005001-ZMP0400