Z8018x Family
MPU User Manual
61
MMU Common Base Register (CBR)
CBR specifies the base address (on 4K boundaries) used to generate a 20-
bit physical address for Common Area 1 accesses. All bits of CBR are
reset to 0 during RESET.
MMU Common Base Register (CBR: 38H)
Bit
7
6
5
4
3
2
1
0
Bit/Field
R/W
CB7
R/W
0
CB6
R/W
0
CB5
R/W
0
CB4
R/W
0
CB3
R/W
0
CB2
R/W
0
CB1
R/W
0
CB0
R/W
0
Reset
Note: R = Read W = Write X = Indeterminate ? = Not Applicable
Bit
Position Bit/Field R/W
Value Description
7–0 CB7–0 R/W
CBR specifies the base address (on 4KB boundaries) used
to generate a 20-bit physical address for Common Area 1
accesses.
UM005001-ZMP0400
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