Z8018x Family
MPU User Manual
280
Table 52. Interrupts (Continued)
Machine
Cycle
Instruction
States
Address
Data
RD WR MREQ IORQ M1 HALT ST
MC1
T1T2TW
TWT3
Next
Op Code
Address (PC)
Vector
1
1
1
0
0
1
0
INT0 Mode 2
MC2
MC3
MC4
MC5
MC6
Ti
*
Z
1
1
1
0
0
1
0
0
1
1
1
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
T1T2T3
T1T2T3
T1T2T3
SP-1
SP-2
I, Vector
PCH
PCL
DATA
1
1
1
T1T2T3
I, Vector+1 DATA
T1T2,TW
MC1
T1T2,TW
TWT3
Next
Op Code
Address (PC)
1
1
1
1
1
1
0
INT1
INT2
Internal
Interrupts
MC2
MC3
MC4
MC5
MC6
Ti
*
Z
1
1
1
0
0
1
0
0
1
1
1
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
T1T2T3
T1T2T3
T1T2T3
T1T2T3
SP-1
SP-2
I, Vector
PCH
PCL
DATA
I, Vector+1 DATA
UM005001-ZMP0400