Z8018x Family
MPU User Manual
201
T
T
T
T
T
3
1
2
W
W
PHI
49
50
E
(Memory Read/Write)
49
49
50
E
(I/O Rea d)
50
E
15
16
(I/O Write)
D –D
0
7
Figure 85. E Clock Timing (Memory R/W Cycle) (I/O R/W Cycle)
PHI
E
49
50
BUS RELEASE mode
SLEEP mode
SYSTEM STOP mode
Figure 86. E Clock Timing (BUS RELEASE Mode, SLEEP Mode, and
SYSTEM STOP Mode
UM005001-ZMP0400