Z8018x Family
MPU User Manual
169
Table 25. Z8X180 Operating Frequencies
Clock
Frequency
Item
Co
4MHz < f £ 12MHz 12MHz < f £ 33MHz
4MHz
< 7 pF
<60W
< 7 pF
<60W
< 7 pF
<60W
Rs
CL1, CL2
10 to 22 pF ± 10%
10 to 22 pF ± 10%
10 to 22 pF ± 10%
If an external clock input is used instead of a crystal, the waveform (twice
the clock rate) must exhibit a 50% ± 10% duty cycle.
Note: The minimum clock input High voltage level is V –0.6V. The
CC
external clock input is connected to the EXTAL pin, while the
XTAL pin is left open. Figure 70 depicts the external clock
interface.
3
EXTAL
External Clock Input
2
XTAL
Open
Figure 70. External Clock Interface
Figure 71 illustrates the Z8X180 clock generator circuit while Figures 72
and 72 specify circuit board design rules.
UM005001-ZMP0400
ZILOG [ ZILOG, INC. ]
