Z8018x Family
MPU User Manual
172
Miscellaneous
Free Running Counter (I/O Address = 18H)
If data is written into the free running counter, the interval of DRAM
refresh cycle and baud rates for the ASCI and CSI/O are not guaranteed.
In IOSTOP mode, the free running counter continues counting down. It is
initialized to FFH during RESET.
Free Running counter (FRC: 18H)
Bit
7
6
5
4
3
2
1
0
Bit/Field
R/W
Counting Data
R
?
Reset
Note: R = Read W = Write X = Indeterminate ? = Not Applicable
UM005001-ZMP0400
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