eZ80L92 MCU
Product Specification
81
Event Counter
When Timers 0–3 are configured to take their inputs from port input pins PB0 and PB1,
they function as event counters. For event counting, the clock prescaler is bypassed.
The PRT counters decrement on every rising edge of the port pin. The port pins must
be configured as inputs. Due to the input sampling on the pins, the event input signal fre-
quency is limited to one-half the system clock frequency. Input sampling on the port pins
results in the PRT counter being updated on the fifth rising edge of the system clock after
the rising edge occurs at the port pin.
Timer Output
Two of the Programmable Reload Timers (Timers 4 and 5) can be directed to GPIO Port B
output pins (PB4 and PB5, respectively). To enable the Timer Out feature, the GPIO port
pin must be configured for alternate functions. After reset, the Timer Output feature is
disabled by default. The GPIO output pin toggles each time the PRT reaches its end-of-
count value. In CONTINUOUS mode operation, the disabling of the Timer Output feature
results in a Timer Output signal period that is twice the PRT time-out period. Examples of
the Timer Output operation are illustrated in Figure 21 and Table 31. In these examples,
the GPIO output is assumed to be Low (0) when the Timer Output function is enabled.
CLK
PRT Clock
(Clock 4)
IOWRN
I/O Write to TMRx_CTL Enables PRT
PRT Count
Value
X
3
2
1
3
2
1
Timer
Output
Figure 21. PRT Timer Output Operation Example
Table 31. PRT Timer Out Operation Example
Parameter
Control Register(s)
TMRx_CTL[0]
Value
PRT Enabled
1
1
Reload and Restart Enabled
TMRx_CTL[1]
PS013015-0316
Programmable Reload Timers
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