Preliminary Information SP5848
CLOCK
ENABLE
DATA
222
P1
221
P0
220
219
218
217
216
215
21
20
CU1
CU0
RU2 RU1
RU0 MSB
LSB
‘0’
Frequency data (15 bits)
Synthesiser 1 control data
CLOCK
ENABLE
224
T2
223
T1
222
T0
220
CD
219
218
217
216
21
20
‘1’
DATA
RD2
RD1
RD0
MSB
LSB
Frequency data (16 bits)
Synthesiser 2 control data
CU0 - CU1
RU0 - RU2
CD
RD0 - RD2
T0 - T2
: Synthesiser 1 charge pump
: Synthesiser 1 reference division ration
: Synthesiser 2 charge pump
: Synthesiser 2 reference division ratio
: Test modes
P0 - P1
: Switching ports P0 - P1
Figure 3 - Control data
5